Sub-synchronous static converter cascade

ABSTRACT

A sub-synchronous static converter cascade with a slip-ring motor and a static frequency converter connected to the rotor of the motor in which the converter comprises a diode rectifier and a static converter operating as a mains-controlled static converter. A resistor and a voltage-controlled thyristor switch forming a series circuit is connected in parallel with the static converter, and a high-speed circuit breaker bridged by a second resistor is connected between the diode rectifier and the junction of the thyristor switch with the static converter.

United States Patent Pisecker Aug. 8, 1972 [54] SUB-SYNCHRONOUS STATIC 3,136,937 6/1964 Miljanic ..318/197 CONVERTER CASCADE 3,504,254 3/1970 Rosenberry,.lr. ..318/197 inventor: Johann Pisecker, Nussbaumen, swit 3,526,816 9/1970 larce et a1. ..3l8/237 X Zerland Primary ExaminerGene Z. Rubinson [73] Assignee: Aktiengesellschaft Brown, Boveri & rn yi Scheffler & Parker Cie, Baden, Switzerland 7 T [22] Filed: Dec. 21, 1970 [5 1 ABSTRAC A sub-synchronous static converter cascade with a [21] Appl 99837 slip-ring motor and a static frequency converter connected to the rotor of the motor in which the con- [30] Foreign Application p i Data verter comprises a diode rectifier and a static converter operating as a mains-controlled static con- 14,1970 Swltzefland "465/70 verter. A resistor and a voltage-controlled thyristor switch forming a series circuit is connected in parallel U.S. the tatic converter and a high speed circuit Int. Cl. breaker a econd resistor is connected Field of Search 241 between the diode rectifier and the junction of the thyristor switch with the static converter. [56] References Cited 1 Claim, 6 Drawing Figures UNITED STATES PATENTS 3,227,937 l/ 1966 Koppelmann et al ..3l8/237 PATENTED/ws 8l972 3.683.251

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Sg\ I G2 gwuwoc Johann Pllsecker BQM JWYS LA My SUB-SYNCHRONOUS STATIC CONVERTER CASCADE This invention relates to a sub-synchronous static converter cascade with slip-ring motor and static frequency converter, connected to the rotor and comprising a diode rectifier and a static converter, operating as a mains controlled inverter, and also a method for operating such apparatus.

In known sub-synchronous static converter cascades a static frequency converter is connected in normal operation to the rotor side of a slip-ring motorwhich is driven through a starting resistor to a speed above the minimum operating speed. The frequency converter comprises a diode rectifier and a thyristor converter adapted to operate as a mains controlled inverter. Speed adjustment in this case is obtained by the introduction of the controllable inverter d.c. voltage which acts against the rectified rotor voltage which in turn is proportional to the slip. A smoothing choke decouples three-phase systems of different frequency which are connected via the intermediate d.c. circuit. Voltage matching which is normally required is obtained through a transformer.

When sub-synchronous static converter cascades with a large power output are used for applications having particularly stringent requirements regarding the operational reliability (for example in power stations or in the chemical industry), the operating characteristics of the cascade under abnormal conditions will have an increased significance, for example in the event of a sudden voltage collapse and interruption in the supply mains, mains short circuits and the like. Although the same kind of operation and fault cannot be excluded in other industrial applications for these static converter cascades, little attention was evidently paid to them hitherto since no reference relating thereto can be found in the numerous publications on subsynchronous static converter cascades.

The cascade circuit, preferred hitherto for industrial applications, offers only very limited facilities for interrupting within a few milli-seconds the overcurrents which results from unexpected faults such as failure of the regulating and control equipment, sweeping of the inverter, internal and external short circuits, brief interruptions in the supply mains etc., or for limiting such overcurrents to values which do not represent any excessive stresses for the semi-conductor static converter until the circuit is interrupted by the a.c. circuit breaker. Moreover, the voltages induced as the result of switching operations in the supply mains on the rotor side and which may, in some cases, be higher than the locked rotor voltage, become fully effective on the rectifier as well as on the inverter if the intermediate d.c. circuit is dead. Both stresses, the current stresses as well as the voltage stresses, would have to be taken into account-in the design of the static converters if sequential damage is to be avoided. A timely changeover to the starting resistors cannot be considered in the majority of faults in view of the internal delay of the three-phase circuit breakers which are available.

Current-over-dimensioning is generally no longer necessary for faults having the nature of a short circuit if a high-speed d.c. circuit breaker is provided in the d.c. intermediate circuit, such circuit breaker being designed to operate within a few milli-seconds when a preset current value is exceeded, and the circuit breaker supplying an arc voltage which is higher than the source voltage which drives the over-current.

As shown by simple comparative calculations relating to the yield of the over-voltage source, low-energy attenuation means (for example d.c. capacitors, coupled into the circuit via diodes, self-quenching arc gaps and the like) are not suitable in practice for reducing the voltage stresses.'A reduction of the over-voltages in the rotor can be achieved only by the use of protective resistors having a relatively low ohmic value and which are adapted for instantaneous switching into the circuit when over-voltages occur, such reduction of the rotor overvoltage influencing the voltage design.

It is the object of the present invention to provide a sub-synchronous static converter cascade which operates reliably even in the event of sudden voltage changes and interruptions. Furthermore, the operating means additionally required for modifying the circuit should have the maximum possible operational reliability in view of the protective function which they have to perform.

The problem is solved in accordance with the invention for a static converter cascade of the kind mentioned heretofore in that a current branch, comprising a resistor and a voltage controlled thyristor switch is connected in parallel to the static converter and that a high-speed circuit breaker, bridged by a second resistor when in the open state, is connected between the junction of the thyristor switch with the static converter and the diode rectifier.

Exemplified embodiments of the invention are explained hereinbelow by reference to the accompanying drawings in which:

FIG. 1 shows a sub-synchronous static inverter cascade immediately prior to the first running-up phase;

FIG. 2 shows the sub-synchronous static converter cascade during the second running-up phase;

FIG. 3 shows the current and voltage stresses during the running-up phase;

FIG. 4 shows the circuit condition of the subsynchronous static inverter cascade during normal operation;

FIG. 5 shows the sub-synchronous static converter cascade with a dead intermediate d.c. circuit; and

FIG. 6 is a plot depicting current and voltage stresses when subject to sudden mains voltage changes AU,

With reference now to FIG. 1 the static converter system is seen to comprise a slip-ring motor M and a static frequency converter. The frequency converter comprises a diode rectifier G and an inverter G The smoothing inductor L is connected in one branch of the frequency converter while the other branch contains the high-speed circuit breaker 8, which is bridged by a resistor R A serial circuit, comprising a resistor R and a thyristor switch G is connected in parallel to the inverter G As will be more fully explained hereinafter in detail, a current detecting and control means B is included in the intermediate d.c. circuit and functions to open the high-speed circuit breaker S, in the event that the current in this intermediate circuit rises above a predetermined value. Also, as will be explained more fully hereinafter,'a voltage detecting and control means A is also included in the intermediate d.c. circuit which functions to measure the voltage in this circuit and causes the silicon controlled rectifier switch G to fire when this voltage exceeds a predetermined value.

The method of operation of the system with different operating conditions is described in detail hereinbelow.

The two-stage run-up into the operating range will be described first.

FIG. 1 illustrates the circuit condition .of the subsynchronous static converter cascade immediately before the stationary cascade motor is connected to the mains, a solid symbol indicating the readiness of the converter diodes to conduct current (in the same way as in the subsequent basic circuit diagrams). A nonsolid symbol refers to open switches. The high-speed d.c. circuit breaker S, is open at the beginning, current conduction of the inverter G is interrupted (by a pulse blocking instruction applied to the associated control set for the duration of the run-up phase) and the thyristor switch G is closed (by means of a continuous control pulse which precedes switching in of the mains.

Connection to the mains (i.e. closing of the mains switch 8,) initiates the running-up procedure. During the first phase of the running-up procedure, the starting current of the cascade motor is limited by the serial connection of the resistors R, and R Owing to the voltage divider effect, only the voltage proportion which occurs across the resistor R, will appear on the d.c. side of the inverter G said voltage proportion diminishing with an increasing rotational speed in accordance with the falling rotor voltage. When the speed reaches a certain value adapted to the appropriate conditions, closing of the high-speed d.c. circuit breaker (i.e. by bridging of the resistor R performs the second running-up stage and therefore achieves a better running-up performance (see also FIG. 2). If the running-up conditions are pre-defined, the d.c. circuit breaker can also be fundamentally controlled relative .to time.

The inverter G is triggered to conduct current by removal of the pulse block as soon as the cascade motor exceeds the lower limiting speed of the operating range. The actual running-up procedure is completed when the thyristor switch G, is extinguished, a process which takes place by natural commutation if the inverter is provided with a pulse bias, the cascade will then have reached the normal operating condition as illustrated in FIG. 4.

The current and voltage stresses which occur during running-up in the cascade range may be obtained from the graph of FIG. 3. The standardized operating characteristics of the rectifier G, are plotted in this graph for different values of slip s 1.0 to 0.2, the two resistance straightlincs g, and g being also plotted in the graph. The following standard values are selected in this case: I -continuous short circuit current under locked rotor conditions, U,,,,,-ideal no-load d.c. voltage under locked rotor conditions.

The following expressions are also used:

{Yum/Xx) g, .u, (R, R,) I,,/U,,,, on the assumption that R,

= 1?2 I 82- 2 1 ll/ 1") u, .voltage across the contact gap of S, u voltage across the inverter 0,.

The resistance straightline 3,, representing the resultant resistance of the first running-up stage, corresponds to the resistance sum R, R Furthermore, g, is associated with the resistance of the second running-up stage, i.e. the resistor R,. In the interests of simplification it was assumed that R, R,. In order to establish a relationship to the operating stresses, the normal operation zone designated with the letter A and relating to a sub-synchronous static inverter cascade designed for a maximum slip of 20 percent was plotted as a hatched area in the illustration.

The operating point '1, obtained as the point of intersection of the rectifier operating characteristic for stationary conditions (s l) with the resistance straightline g,, is obtained within a few milli-seconds after the sub-synchronous static inverter cascade is the resistance straightline g, is obtained immediately after bridging of the resistor R and starting from said operating point 3, the cascade runs up into the range of normal operation A in which the inverter conducts current. The stress values associated with the appropriate operation point may be obtained from the graph:

1,, i I current stressing of the rectifier G, and of the thyristor switch voltage stressing on the d.c. side of the inverter voltage across the contact gap of the high-speed d.c. circuit breaker.

The circuit condition of the system in normal operation is illustrated in FIG. 4. The high-speed circuit breaker S, is closed and the slip power associated with the affected operating point is returned into the supply mains through the inverter G The thyristor switch G is opened and prevents continuous loading of the resistor R,.

The system described hereinabove does not therefore differ from the known system under normal operating conditions.

For most applications of sub-synchronous static inverter cascades it may be assumed that stationary operation is accompanied by an uninterrupted current flow in the intermediate d.c. circuit and therefore a practically continuously closed rotor circuit. However, in the case of quick-acting regulating apparatus or in the event of major regulating deviations it is possible that the current in the intermediate d.c. circuit is temporarily completely reduced in order to achieve the maximum possible delay. Moreover, in the interests of uniform instantaneous or highspeed changeover switching of one load group, it is appropriate for the rotor current in the cascade motors to be completely reduced immediately prior to rupturing from the original mains and subsequently to maintain the dead state of the intermediate d.c. circuit by means of a pulse block on the inverter for the entire changeover period. In order therefore to take account of the actual and possible stresses it is necessary to examine the method of operation of the proposed cascade circuit both with the intermediate d.c. circuit carrying current and carrying no current (see FIG. 4 and FIG. 5).

Stresses which exceed operational values may be the result either of faults within the cascade (for example short-circuit, block and/or blockage losses of the diodes, failure of the regulating and control apparatus etc.) or they may be due to sudden changes of the mains voltage (for example voltage collapse and interruption, mains short circuit, voltage return in an unfavorable phase). While faults of the first kind generally require operation of the cascade to the interrupted in order for the fault to be remedied, temporary mains disturbances, particularly in applications subject to stringent requirements regarding operational safety and reliability, should not cause any substantial restriction of operation or even result in consequential damage in the cascade range.

It is known that voltage changes in the supply mains result in more or less well-defined compensating phenomena in the connected asynchronous machines. In the event of sudden changes by large amounts it is possible for the different compensating variables to temporarily amount to a multiple of the operating values so that not only the machines themselves but also other electrical operating media are stressed to a very high degree. This also applies particularly to subsynchronous static converter cascades in which, in the absence of suitable measures, the full magnitude of the compensating variables act on the semi-conductor static converters which are particularly sensitive to overstressing.

In order to formulate the following description of the method of operation of the proposed circuit in the event of mains disturbances as clearly as possible, it is proposed that the following simplifying assumptions be made:

I. The asynchronous machine is operated with a small amount of slip, i.e. near synchronism. The alternating locked rotor voltage is practically absent by contrast relative to the compensating component.

2. The asynchronous machine is operated either near the no-load point or with a quasi-open rotor circuit (with a blocked rectifier G and an open thyristor switch G The locked rotor current may therefore be neglected relative to the compensating current.

3. Saturation effects in the asynchronous machine are also neglected. Allowance for the resistance of the winding is made only by the introduction of appropriate decay period constants.

4. During the mains disturbance the inverter G is either operated with a modulation angle of nearly 90 and does not therefore supply any average reverse voltage or it is completely driven to cut off by means of pulse suppression.

5. The transient overshoot of the compensating current in the intermediate d.c. circuit immediately after the disturbance begins is neglected. This is permissible particularly in cases in which the intermediate d.c. circuit contains a relatively high ohmic active resistance in addition to a smoothing inductance.

By making these assumptions, it is possible for the current and voltage compensating components resulting from a sudden change of mains voltage to be displayed in clear diagrammatic form. This is shown in FIG. 6. In this graph, the symbols i u,,, g,, 3 U and u, have the same significance as in FIG. 3. The following additional terms are employed:

T, time constant of the d.c. stator field T, T, T,, T l, ll transient current and voltage stresses in the event of mains short circuit I, ll transient current and voltage stressing on reclosing in phase opposition t time elapsed from the beginning of the disturbance According to FIG. 6, any change of mains voltage can be associated with a defined rectifier output characteristics with which the operating points would coincide for different load changes if the compensating components would not decay. In actual fact, however, and on the assumption of linear relationships, the compensating components diminish exponentially. A first approximation of the salient decay period constants are obtained by converting the active resistance on the d.c. side into an equivalent resistance of the ac side to which the active resistance of the rotor winding is added. Depending on the ohmic value of the resistance on the d.c. side, this yields active stator time constant (responsible for the reduction with respect to time of the stator side d.c. element and therefore for the characteristic of the current compensating component in the intermediate d.c. circuit) which are disposed between the appropriate transient value T, (30 milli-seconds) and no-load value T (1.0 to 4.0 seconds) of the related asynchronous machine. The rotor time constants diminish rapidly towards zero with an increasing resistance value, and in considering the circumstances described hereinbelow, they can usually be neglected relative to the stator time constant. As shown in FIG. 6, the variation of the compensating current with respect to time can be allowed for by introducing a time-dependent factor exp (t/!,,) associated with the appropriate resistance straightline.

For as long as the mains voltage varies by only small amounts when the cascade conducts current (FIG. 4), the compensating current will reach the short circuit value corresponding to the magnitude of the appropriate voltage step response A U /U after a few milli-seconds, this short circuit value corresponding to the abscissa value of the graph in FIG. 6, and subsequently decay at the transient machine time constant T In the event of voltage changes by larger amounts, for example in the event of mains short circuit near the cascade and the like, as detected by the current detection and control device B inserted in the intermediate circuit, the output from the device B as applied to the tripping mechanism of the high-speed d.c. circuit breaker S will be exceeded whereupon, the circuit breaker S, causes the tripping value of the current to be interrupted as indicated by broken lines in FIG. 4 and the resistor R will be incorporated into the intermediate d.c. circuit. This proceeds within a few milliseconds, i.e. before the current has reached the short circuit value associated with the appropriate rectifier output characteristic. In this manner, the compensating current is limited, practically without overshoot, to the value defined by the point of intersection of the appropriate rectifier characteristic and the resistance straightline g Decay then takes place at the time constant T S2 associated with the terminating resistance.

As shown by the graph of FIG. 6, it would be theoretically possible to limit the current stresses which accompany sudden changes of mains voltage and other disturbances to any desired small value by increasing the resistance of R However, since an increasing resistance value involves a corresponding increase in the switching voltage U of the high-speed d.c. circuit breaker, and since, moreover, the increased decay period time constant would also result in a severe loss of rotational speed, the value of the resistance R will be made only as high as is necessary to avoid any possible sequential damage. However, due account must be taken of the fact that the effect of saturation reduces the actual stress values to a relatively greater extent as the magnitude of the voltage step increases. For example, in the event of a mains short circuit in the immediate vicinity of the cascade motor (i.e. when AU U 1.0) a reduction by about 20 percent in the stressing must be expected while in the event of voltage recovery in phase opposition (i.e. when A U /U z 2.0) a reduction by as much as 30 percent would have to be expected.

A fundamental distinction between three cases must be made as regards the effects of mains voltage fluctuations when the cascade is dead (the starting condition is shown in FIG. 5). If the voltage changes by small amounts, the voltage dependent controlled thyristor switch G will remain open and the dead state of the sub-synchronous static convertercascade will prevail even after the stepped voltage change. However, if the change of mains voltage results in an intermediate circuit voltage as measured by the voltage detecting and control means A which is greater than the voltage at which automatic modulation of the thyristor switch is started, the previously open intermediate d.c. circuit will be closed within a few milli-seconds via the resistor R by firing the controlled thyristor switch G, from the output of the device A, i.e. the circuit condition shown in FIG. 2 will be reached. The d.c. voltage stress of the inverter G therefore remains limited to the voltage drop which occurs'across the resistor R Finally, if the change of mains voltage is of such magnitude that the compensating current, flowing through R,, causes the highspeed d.c. circuit breaker S, to be tripped, this will be automatically followed by the circuit condition illustrated in FIG. 1 in which the resistor R is additionally inserted into the intermediate d.c. circuit. The rectified rotor voltage acts on the inverter only in the ratio R,/ (R R owing to the voltage divider effect of the two resistors, as can also be seen by reference to FIG. 6.

The means for greatly reducing the voltage stress on the inverter by voltagedivision is of particular interest in applications in which there is a demand for instantaneous or rapid changeover switching of individual drives or for a common changeover of entire groups of drives. The current in the intermediate d.c. circuit is reduced at the highest possible speed after the mains changeover command is given, namely by targeted interference in the grid control system. The condition of the quasi-open rotor circuit illustrated in FIG. 5 (inverter G and thyristor switch G driven to cut off) will be reached before the definitive isolation from the mains is completed if the high speed d.c. circuit breaker S, is tripped at the same time. If reconnection of the mains does not take place at a phase which is favorable relative to the residual voltage, the thyristor switch G will close automatically at the moment at which the mains is connected and the rectified rotor voltage will subsequently decay, approximately with the transient stator time constant. Changeover into the state of normal operation (FIG. 4) is performed in the same manner as in running-up by natural commutation, namely as soon as the intermediate circuit voltage has decayed to operating values.

The voltage stress across the inverter part of the cascade will therefore become smaller the lower the choice of the ohmic value for the resistor R This is counteracted substantially by the resulting increase of the compensating current through the thyristor switch G (see FIG. 6). It is therefore particularly essential to allow for the appropriate economic considerations when the optimum value of the resistance is defined.

The circuit stability of the sub-synchronous static converter cascade can be substantially increased in the proposed circuit configuration with a relatively slight effort. Current and voltage stresses which occur in the cascade range in the event of mains disturbances and which may in some circumstances amount to a multiple of the operating values, can be controlled without sequential damage if the individual parts are suitably dimensioned and matched. This is of importance, par ticularly for applications in which very stringent requirements are made regarding operational safety and reliability, for example in power station operation where sub-synchronous static converter cascades are being increasingly used as drives for boiler feed pumps, the operation of which should not be endangered in any manner by temporary mains disturbances. It should also be mentioned that the present circuit configuration closely meets the requirements of the instantaneous or rapid changeover switching which is desired for various applications.

A further advantage of the system is due to the fact that it is possible to dispense with the switch gear previously provided for the starting of the cascade motor. Furthermore, it is not difficult to perform the runningup operation as described in two steps thus greatly improving the running-up characteristics. After completion of the running-up procedure, the normal operating state is obtained in simple manner by natural commutation of the starting current to the inverter.

I claim:

I. In a circuit arrangement for operating a slip-ring induction motor in the sub-synchronous range wherein the slip energy is fed back into the mains by means including an intermediate direct current circuit comprising a diode rectifier and a mains-controlled static inverter connected in cascade, the combination comprising a first resistor and a silicon controlled rectifier switch arranged in series therewith and which is connected in parallel with said inverter, said rectifier switch and said inverter being correlated such that said rectifier switch is rendered non-conducting when said breaker being normally closed when said inverter is operating, and a second detecting and control means monitoring the direct current in said intermediate circuit and which applies its output to effect an opening of said circuit breaker when the current in said intermediate circuit ex ceeds a predetermined value thereby to introduce the resistance of said second resistor into said intermediate circuit. 

1. In a circuit arrangement for operating a slip-ring induction motor in the sub-synchronous range wherein the slip energy is fed back into the mains by means including an intermediate direct current circuit comprising a diode rectifier and a mainscontrolled static inverter connected in cascade, the combination comprising a first resistor and a silicon controlled rectifier switch arranged in series therewith and which is connected in parallel with said inverter, said rectifier switch and said inverter being correlated such that said rectifier switch is rendered non-conducting when said inverter is operating, a first detecting and control means monitoring the voltage of said intermediate circuit and which applies its output to effect a firing of said rectifier switch when the voltage of said intermediate circuit exceeds a predetermined value for an operating mode when said inverter is cut off, and a circuit breaker having a second resistor arranged in parallel therewith and which is connected between said diode rectifier and the junction point at which said rectifier switch connects with said inverter, said circuit breaker being normally closed when said inverter is operating, and a second detecting and control means monitoring the direct current in said intermediate circuit and which applies its output to effect an opening of said circuit breaker when the current in said intermediate circuit exceeds a predetermined value thereby to introduce the resistance of said second resistor into said intermediate circuit. 